CS 2700 Digital Circuits
- Division: Natural Science and Math
- Department: Computer Science & Engineering
- Credit/Time Requirement: Credit: 3; Lecture: 3; Lab: 0
- Prerequisites: MATH 1050 May be taken concurrently with instructor approval.
- Semesters Offered: Spring
- Semester Approved: Spring 2023
- Five-Year Review Semester: Fall 2027
- End Semester: Fall 2028
- Optimum Class Size: 20
- Maximum Class Size: 30
Course Description
This course is an introduction to digital systems, logic gates, combinational logic circuits, and sequential logic circuits. It includes minimization techniques and implementation with encoders, decoders, multiplexers, and programmable logic devices. It considers Mealy and Moore models of state machines, state minimization, and state assignment. It also introduces a hardware description language. This course is cross listed as ENGR 2700.
Justification
This course is part of the approved curriculum for our Software Engineering degree. This course is typically taken during the freshman year of the Software Engineering curriculum and will prepare the student for subsequent course work.
Student Learning Outcomes
- Students will understand and be able to work with the number systems around which digital computer hardware is designed, including conversion between number systems, two's complement binary numbers, and binary arithmetic.
- Students will be able to use Boolean algebra as a tool in the design of digital circuits which are to perform a given logic function, and to use Karnaugh maps to find the minimal realization of such circuits.
- Students will have a basic understanding of digital logic to prepare him or her to transfer into the professional engineering program at a university, and there continue the study of digital logic at an advanced level.
Course Content
The following topics will be covered in this course: Number systems; Switching functions; Combination logic circuits; Sequential logic circuits; Minimization of logic circuits; Modular logic devices; Programmable logic devices; Hardware description language.
Key Performance Indicators: Homework 10 to 20%Quizzes 15 to 25%Examinations 30 to 50%Comprehensive final examination 15 to 35%Representative Text and/or Supplies: S. Brown and Z. Vranesic, Fundamentals of Digital Logic with Verilog Design, current edition, McGraw-Hill Pedagogy Statement: Instructional Mediums: Lecture